|
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Single-Chip 16-Port SerDes Gigabit Switch
F5 P5 ]8 z! E" R& K) Q& X$ A9 p2 d* d9 U
16-port 10/100/1000 Mbps integrated switch$ `, j/ Z% v" T7 `( W
controller via 1.25G SerDes/SGMII/fiber
7 A5 }9 n u# L3 \1 L) g$ l• Embedded 256 KB on-chip packet buffer
4 e* p/ i6 K4 s( L3 d9 D/ L8 i• One 10/100/1000 Mbps In-band Management
1 e& ]3 y; J. x+ C6 j! }. R rPort (IMP) with GMII/RGMII/RvMII/MII interface" P, W* F. p w% B+ }
for PHY-less connection to a CPU/management
, m2 ^) g. `3 T( ~- ] Jentity (for management purposes only)
4 M1 i. p0 e0 N; Z7 g3 y9 j2 `/ O, a• Integrated address management' ]6 y; |% }) C# F- ], i& [
• Supports up to 4K MAC addresses
7 u6 P1 H v q; U( F; r" A+ \7 C• Supports jumbo frames up to 9728 bytes.2 k5 O6 p& M3 y
• Supports EEPROM for low-cost chip configuration
$ m/ J6 V+ M& d. T0 A6 _; B5 ?: f• Integrated Motorola® SPI-compatible interface. |; {3 k3 p3 ]1 W; S
• Supports port mirroring7 Y1 m" I: p+ \
• Port-based VLAN and 4K IEEE 802.1Q tag VLAN
1 S, G7 f# p( u4 Y, t9 Z• Port-, DiffServ-, MAC-, and IEEE 802.1p-based QoS+ d1 d" S6 ~% a) ]/ f+ [7 Y
for four queues
- y( \. z' @; C• Supports Spanning Tree, Rapid Spanning Tree, and
P3 o8 o" _3 a a& MMultiple Spanning Tree protocols (802.1D/1s/1w)2 v2 T- W: M, [' R1 T8 _( H$ J
• Supports IEEE Standard 802.1X port security
9 b% W- ^0 z* ]7 G$ A2 `* b• Supports pseudo-PHY MDIO access
s R) B% d% h. r8 `5 I) P• MAC-based trunking with link fail-over
4 ?1 P+ f) b+ a0 t& x• Ethernet-in-the-last-mile (EFM) support: OAM and
3 k6 I& G2 \2 L; W# nP+ f& i: r+ q$ B7 V+ ?* u7 D9 ~
• Low-power (2.2W total) 1.2V core/2.5V (SGMII I/
! T$ @1 ~/ w+ N$ G( e6 `O)/3.3V (GMII/MII/RvMII) and 2.5V RGMII
U5 A+ E! I* `% @1 doperation with 3.3V I/O tolerance; l% O: S4 A6 ^
• 256-pin FBGA package
: Y/ v; A3 b" a5 h) E2 w# L; [BCM5396 Data sheet
% Q5 c+ G" R V) `- f2 ~Revision History
" O, d0 t+ X& u7 K5 WRevision History* f5 G; G4 R3 [* R& g( O. z
Revision4 H- t& f) S9 C% e, o
Date
7 Q8 k y% C- o xChange description
2 M' q" u5 S% }; T1 g+ b0 [5396-DS114-R10/4/13 Added
: W; B2 s5 z* x6 p3 R3 }' [! z4 i"ethertype based qos on page 29
# H8 w4 ~3 s; J* ?Updated:
' b9 t% O) T8 m- W3 WFigure 2: Priority packet Mapping Flow, on page 27, K7 P5 e$ l* D" T' D0 z( L: o1 _3 |
Table 1: Frame Priority Decision Tree Summary on page 30; K a/ p0 ^% X2 r: ]
·“ Jumbo frame Support" on page33
3 I9 s+ r8 V% c* ^6 f8 qTable 17: Pseudo-PHY Mll Register Definitions on page 725 T; c0 _6 F1 P: V
Serial LED Interface"on page 74
7 i9 b/ W$ N6 |5 E: wTable 43: External PHY Scan Control Register(Page oOh: Address 86h)) g" m+ W( P7 v* J1 f
on page 101
5 W G8 x/ d5 H( M" U( pTable 177: Serial lEd Interface Timing, on page 191! ], I) I. U9 S/ F3 C
5396-DS113-R 02/07/12 Updated
8 k# D+ W' V: T$ V7 g5 nTable 139: Internal Ser Des registers Page descriptions 10h-1Fh, " on* p: M% V- G) ^* K
page 145
/ q X$ n/ Z7 I. z' E J% \Table 140: " Internal Ser Des Registers Page 10h-1Fh on page 145
: O! o; j% t v( f) B. Z: `5 I# mTable 192: New Priority Map Register(Pages 34h: Address oC-OFh,on) A. u; h5 h9 ~- ]5 s4 n( \
page 185* r7 L W. [- t6 g+ Z
5396-DS112R06/10/10 Updated:1 X6 J m# X1 Q- a5 E P8 T3 O' L. j0 x
Table 144: Auto-Negotiation Link Partner ability (page 10h-1Fh+ H( |' G, E2 a* i5 z8 p( v3 j
Address 0Ah-OBh), on page 1537 `* p( Z8 L. f$ N. G5 J
PRBS Status Register(Page 10h"1Fh: Address 32h" 33h)"on page 166.% ?8 b0 Q) `5 x% J) I7 C/ p2 b
5396-Ds111R08/2609 Updated:
2 \% Z. H% S9 w q6 n7 s. zSection 12: Ordering Information, on page 175$ T B! g0 B9 V: s
5396-DS110R02/2508 Updated:
; q; x, r7 H& V8 r0 zSignal descriptions on page 54: BIST CLRMEM SEL and SKIP MEMbIS j. f8 ^! O0 z& C2 ?7 c8 g1 k& k! `$ u
descriptions* m' N9 C: [8 h! j- F4 M
Removed
# v& L5 c& H- \5 bReferences to behavior of management frames in unmanaged mode7 u( P0 P7 n4 f/ a- B" E2 W
5396-DS109R11/13/07 Updated
+ `2 r$ \' x L7 O. z! hManagement Frames" on page 24, and"Frame Management on# L6 V$ q5 U, W3 T% F; [0 l
page 32: Corrected terminology relating to the in-band management% a5 g* n: Q5 h9 a; x2 j2 [
port7 V# W: ^0 ]. Q
Table 59, Management Mode registers (Page 02h), on page 81:
4 t3 o4 q; N. I# tChanged definition of bits 7: 6* O( Z/ M* d$ d" U+ o7 z: ^" [
Added:) O% N n; q. B0 @8 |
In-Band Management port"on page 33 Added note
\4 B- [ `) q) x# NTable 23, Signal Descriptions, on page 53 and "Pin Assignments"on: Q# ^* ]7 F$ H5 c
page 58: Added BIST CLRMEM SEL, SKIPMEMBIST, EN EXT CLK, and
6 ^, E# C5 {, X' @. \% aEXT CLK signals to all signal/pin tables and figures/ {8 W) d$ W. Y" Y5 f
BROADCOMe1 c5 p% D q3 g2 l0 x! [- w* \8 f# {
Single-Chip 16-Port SerDes Gigabit Switch
9 n* v( F& x2 m: SOctober4,2013·5396-DS114-R
, j. m$ @+ J3 H* _0 x& LPage 3
, C+ Y4 v0 @2 [8 y+ R# CBROADCOM CONFIDENTIAL: U' v& I( m6 k" U$ q, w$ q' n: E0 _
1 z6 Q; ~8 t3 B( n' x4 DBCM5396 Data sheet
8 z+ H# S+ J' a& Q4 n2 URevision History
( c/ Q( U: m1 yRevision
( X* ^+ @3 W( {7 t3 Q4 U, J( QDate
; x' G+ k" q; sChange description: C7 O, i' \8 s+ R% Y8 p# C
5396-Ds108R06/2507 Updated:7 U& G' m3 [( A4 ]
In-Band Management Port"on page 33
M+ V; t$ z4 t8 I8 MTable 28, 10/100/1000 Port Control Register(Page o0h: Address 00h-
: F5 Z( G0 q+ ?OFh),on page 69' ~7 b4 a ~ m Q) c
Table 29, "IMP Port Control Register(Page 00h: Address 10h), on page4 R5 x! t* o7 z! C1 X
69.3 b) e; ^8 h# E+ F) C6 {
Table 66, Global Management Configuration Register(Page 02h' M. ]) ?0 L% T4 @& ~7 v# P
Address ooh), on page 86
) F* X+ o( ]# ?0 k1 |7 J' z8 ]Table 229, Thermal Properties with External heat sink 23 mm. 23 mm
2 P+ H- ?% p9 b& D15 mm. Blade Fin, on page 1801 B- a( V" f" J* S2 r* w0 r! h
Removed0 i9 S" \7 \( J R. {% S* q
Memory Test Control Register Page 00h: Address EOh) from page 75" E% A/ w6 |9 l6 X L' d" y" c
5395DS107-R07/126 Updated:
; I: a+ Z/ `! [$ n: O" W1 }Figure 39, 256-Pin FBGA Package Outline Drawing, on page 181
! ~! l7 A3 R" w( K9 {1 F4 k: _6 G5396-DS106-R05/2406Aded:8 f5 G' r4 q* s
Table 154, BER/CRC Error Counter Register(Page 10h" 1Fh: Address 2Eh
8 O, l: G) w: w. r* l2Fh),on page 128
. g6 w' U+ d' e% |Table 155, PRBS Control Register(Page 10h"1Fh: Address 30h "31h)6 v$ Z; r m4 A9 n
page 128: A6 S+ N# L$ |: O# u
Table 156, PRBS Control Register(Page 10h" 1Fh: Address 32h" 33h),$ t( c5 ~" S' @: v
on page 128
Z1 h+ q4 [6 }- V) j1 v+ a0 L, XTable 157, Pattern Generator Control Register( Page 10h 1Fh: Address
3 ~: W: F2 c/ M) G5 p. K34h"35h),on page 129# S3 K( M. `! M7 O: d
Table 158, Pattern Generator Control Register(Page 10h 1Fh: Address C; c4 j3 u$ h! H, Q
36h" 37h), on page 1308 X, P$ E3 g2 d2 N9 r
Table 159, Pattern Generator Control Register(Page 10h" 1Fh: Address
, M6 h& z; G2 G+ I2 `36h~37h)," on page130.+ C( |4 z3 g3 ^1 k. K
Table 160, Force Transmit 1 Register(Page 10h" 1Fh: Address 3Ah
4 L2 t# D+ q) q" t0 ^' j1 L3Bh),on page 1305 O2 R5 n9 ?* p0 _) X$ U1 f
Table 161, Block Address(Pages 10h-1Fh: Address 3Eh"3Fh),on page. ^4 T! w! f" ]6 U4 m0 `
131
M! w4 y& M& _5 k; R3 CBROADCOMe
& q F8 U( `. a, {8 D$ Q) dSingle-Chip 16-Port SerDes Gigabit Switch
+ W! Q- b& g! a( D2 Z" ?, w! z. wOctober4,2013·5396-DS114-R
. _8 ?+ j) n0 U& ~# N0 fPage 4
# S) v" {) W3 Y' u( M! a: wBROADCOM CONFIDENTIAL
' D2 I! w4 I; H2 U8 }1 l0 l G5 h3 Z1 C5 n& m& u# \. r/ x
BCM5396 Data sheet
7 f3 A- w- E0 gRevision History& w8 b# D2 |7 d0 ]3 x
Revision4 u# ?$ P1 w2 `9 U' l8 }
Date5 U. k8 O# j7 {8 u5 u9 p7 \
Change description3 l$ `) L9 B; O$ ]9 X9 y
5396-DS105R0419/06 Updated:
8 F, F# T& Q2 |. T/ a* v9 PFeatures list on front cover |2 ^3 m* c8 Q. ^0 L# R5 E
."LED Interfaces" on page 50! S" v2 I' z- q" O, \, B ]- S" @
Table 23, "Signal Descriptions on page 53% C& |' E2 g1 C, H8 Q& \
Table 24, "Pin Assignment(Listed by pin Number) on page 58+ p- w7 R3 x! x& \9 A5 L* r1 C
Table 25, "Pin Assignment ( Listed by Signal Name), on page 60
8 t+ G5 P/ |' `! Q- x+ i· Figure21,“ Pins Top view," on page62.
* |& E* G* {: M7 e# N! Z* jTable 27, "Control Registers(Page ooh),"on page 67.
9 s% G# E( b) ZLED A, B, C, and d registers to reserved in Table 27, Control registers* u7 i4 i2 h5 p6 w
(Page ooh), on page 67, s9 S, W2 N# V% B3 l7 _5 R: Q
Table 65, Strap value Register(Page 01h: Address 70h-73h), " on page
6 a' T8 k" j+ E# N: v85
. z! q0 G1 P+ [$ @, i- W, a4 STable 94, " ARL Search Result Register(Page 05h: Address 3Bh-3Eh), on' Y% Z& u- F' {" c& p( G9 N: T
page 98' l1 e! V" R6 N `0 r* b5 F0 m1 S
Table 95,"ARL Search MAC/VID Result Register 1(Page 05h: Address, n d) r' P; P! h/ ]6 C
40h-47h) , on page 98
& N" \; l! w X* O& Z1 BTable 231," Ordering Information on page 182, G9 N3 G: d! ]" d8 F$ ?
Removed
- l% I) E# E! N+ ]4 t* t0 HLED A, B, C, and d register descriptions from section"Control registers
, a$ X& b. J+ m" I9 j" Son page 67.7 J6 A: @8 v" W- t) W( O
5396-DS104R11/10/05Aded:9 J/ z0 t1 q' G. ~$ i9 i! `3 ~" ~
I-temp package ordering information to Table 223,"Ordering
2 i2 w9 J; Q/ D4 o: g) f( CInformation. T, c- s: V7 o0 v4 D
5396-DS103-R 09/21/05 Updated) _( x) T) {* z! {* }" R
The minimum, typical, and maximum for the 2.5v power rail pin in table
9 F" ]' Y+ a/ P) X% _208, "Electrical characteristics% |, \4 M* z" Q+ z$ h
5396Ds102R09/1605 Updated:! K ^6 B: R2 V! z6 H3 m; @0 f/ s( ?
The minimum, typical, maximum, and units for the 2. 5v power rail pin in( i) i1 i, S2 R+ J* t ^
Table 208, Electrical Characteristics! X5 |4 ?4 r3 q; v
Added:
' V" z/ c( d" g3. 3V power rail (IMP port) pin for IDD symbol in Table 208,"Electrical. S. p% G/ t$ I+ M {
Characteristics"8/ q) L! ?6 w+ d
BROADCOMe
0 W+ f+ m5 b/ |% n0 R5 ZSingle-Chip 16-Port SerDes Gigabit Switch
( X6 A& o, N7 g0 U2 g: n& kOctober4,2013·5396-DS114-R6 Y. i! w% G! n E4 M8 Q
Page 5
' T4 T' w' J: {! z1 `8 E0 R1 J$ y; {, _+ LBROADCOM CONFIDENTIAL
9 a4 g/ z3 X) f1 b& q$ M* D! Y7 y7 S) k" Q1 L
Revision4 E5 K/ g9 ?6 ~4 n3 Z2 K1 }2 @ U
Date
/ v) R* C- M0 q' ^& q- X( E) U1 i& }Change Description
4 j Q: M" @0 U5396-DS101-R 09/13/05 Updated- x/ b! f$ _( M3 b: d
Figure 16, Serial EEPROM Connection, on page 42
& r) {+ H- O2 F) [) {That the aUto Poll DiS pin is pulled low,9 g4 v- I4 G- m& R2 G7 W4 A
reset in"MDC/MDIO Interface"on page 4 hot high, during power-on/
& I( ~7 ^1 ^0 \Figure 17, MDC/MDIO Interface, on page 444 P5 E$ r# L# z0 L& F: Y
When the switch is master-sourcing to When the switch is slave-driven in
# a( w7 n# H$ {/ {MDC/MDIO Interface Register Programming"on page 49$ s: ]2 v* I ]
In Table 23, Signal Descriptions on page 53/ u5 ^# E: s. W" E4 z6 ]) n
Description for hw fWdG EN
# W0 t/ m, d: Z3 N RType for EXTCLK- j0 |1 Z2 q3 v5 j9 w
Pages 50h-60h to Reserved in Table 26, Global Page Register Map on1 ]2 ]! A6 r x+ [% g" G
age 64
+ s, V+ F4 b% P7 e) s1 YThe Description in Table 95, ARL Search Control register(Page 05h; K* z, j4 A6 a" Q0 d- s! Q
Address 30h),on page 98, G. H g# L, I5 V
The default in Table 169, "Queue N Weight Register(Page 30h: Address6 H2 [! e- B* P7 H+ y2 q
81h-84h), "on page 1324 e7 r8 D" T; [/ M0 ?: f6 {0 g
Table 208, Electrical Characteristics, on page 158) T, h1 ?# j5 w' u$ n
Added
) r H: u7 O+ c) [ [9 i( r5 GPage 00 Addr 24H"25H Bit[10: 8] to Table 19, "Serial LED Mode matrix
2 M& E3 s/ I. e& A( j0 i. Von page 50
$ u: x& ?: M1 A5 y( ERemoved
+ ~) v- ]9 x) Z$ e) j+ a( kFrom Table 7, "Behavior for Reserved Multicast Addresses, on page 19: S# X% d: b# E$ z1 i/ q& i
0180C200-00-01
! i" I2 q8 a" ]" J% S! [* [0180-C2-00-00-10
/ `8 G$ ]* e7 A7 @3 c5396-DS100-R 04/15/05 Initial release
9 x) i' ~6 n$ mBroadcom Corporation o2 c, J* G$ w1 d3 N9 a, j4 z
5300 California avenue B/ B7 G! O2 M/ d- ~1 u
Irvine, CA 92617( c( Y9 K- v% v$ S4 l' ]- j* l
o 2013 by Broadcom Corporation8 C/ X$ s0 q% A; }# m0 \
All rights reserved: @8 P4 t- _4 _. ^2 H! {2 ~! u
Printed in the us.a
4 ~- e, _; r6 f, kBroadcom, the pulse logo, Connecting everything, and the connecting everything logo are among the
6 T) N) G7 F% O% d ~3 f: \1 Etrademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and or8 M* U; j0 ?. ~+ k/ w+ m1 V
the EU. Any other trademarks or trade names mentioned are the property of their respective owners
) V- }4 }0 O$ p. ^' i' U, N0 ]This data sheet ( including, without limitation, the broadcom component(s identified herein)is not designed,; I4 Q- \! t2 q3 k* d6 N3 c
intended, or certified for use in any military nuclear, medical, mass transportation aviation, navigations0 s) Q7 g* N- G6 U. i! j
pollution control, hazardous substances management or other high-risk application BROADCOM PROVIDES
6 k9 O+ _0 h% B' o4 t, WTHIS DATA SHEET"AS-IS, WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES
: z3 p# j! z6 J1 g: NEXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
6 W$ G: n" M2 w. AMERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.9 ~! X, M8 {9 l7 ?7 v
2 D& ?. P+ {, n8 R/ rBCM5396 Data Sheet
% K2 j; I# t9 k4 o5 `- @7 ]4 zTable of contents
) x2 v1 I/ @0 Q2 b; T( A/ }Table of contents1 e" h* q- w" h) | Q' S
About this document% N/ x, ^# `9 Q/ V$ f/ N3 {
=·==·==·=·=·=
9 X4 c) J' a% D6 H, W! k24: `. t8 K5 k/ O' f& E7 C8 v4 L! _
Purpose and audience
) u! S% L, g1 g24
2 U& i: @" Y# r2 oAcronyms and abbreviations
5 t1 @) w4 {3 Y* ?3 E9 J) w+ \24
" T- G) u3 L: \; RDocument conventⅰonS∴
5 Z: J/ z2 W1 w& K8 _24/ o! M0 ~1 ^9 s3 f
Technical Support.......0 j' @% o0 ~1 ?+ L
·::·
( {4 ^8 J ]$ A; y9 H& P24" K$ [9 j+ E& X2 g( h- z* L# u7 t
Section 1: Introduction .minwoo 25* I$ G: H5 Y4 r, u1 A
Overview..…,,…/ ]0 e( t# X3 C/ @& ~
25' w) r$ `3 S( b4 D3 }
Data Sheet Information
t- v& n; e: ^25, a! R) n0 U+ J8 }# X, r
Section 2: Features and operation .moon
% V+ k) ^* l" V- Y6 W26
& ~4 `- d2 p" B7 b' s! q$ m) ZOverview.……
( e& Y5 T5 E2 `26
+ r4 H) S7 `" r% l3 TQuality of Service…
$ H! ]; {) c3 P, |26$ v6 N1 P# `, y
Egress transmit Queues..........................0 @3 G# y& K a& X6 \) j0 M
28
- P) a. A6 T4 M8 J" e% B9 l7 xPort-Based Qos6 p4 h2 H, E6 J* ?
28
( K. I) e; o. ~IEEE Standard 802. 1P QoS
+ B* h+ o a( ^+ L( r# ~1 r7 H28" ^- ?. m: @! y( X- u% f
MAC- Based Qos………….......
, i. }# @0 R2 o" G# V0 |292 Q: F" l$ c9 h
DiffServ Qos…: a0 j% I8 }+ ?
29
5 c) r0 K7 c. K$ [9 i$ V! WEthertype Based Qos
t: U8 R3 p( R [# I6 L, X29
5 ? M$ N" R& o; Z! g+ gFrame Priority Decision Tree
6 @3 t- c( |2 h302 i% C3 {0 J$ G, S8 n4 M
Port- BasedⅥLAN,…………30
- a" S0 t @' E3 ilEEE Standard 802.1Q VLAN
1 T; |4 S) f1 M8 r3 v. H3 s31' ?' q: y& f; B, ?, n- Q; U
VLAN Table organization……4 S: _& Q! }2 D& p- I
31
' m) @. H2 p* S6 JProgramming the VLan table3 v1 s+ H9 o, i, i! f/ q
32
( l. {3 C" z. m4 d# B# w* _$ B2 ?Jumbo frame Support. ....................................................................................................................33
: m! H. k1 B; t0 v" p8 NPort Trunking/Aggregation
2 N, v0 I0 g! [/ C7 C: Y33) h8 U8 R; I8 b& z
Broadcast Storm Suppression/Rate Contro: O% G8 [& W8 V* K, R i2 m
··::··:···
8 `! v. D! }8 f34
% Y! o. [: C$ i; WTwo-Bucket System$ y" T7 d r& _* y
35
5 T4 e; Y5 N9 uBucket Bit Rate
K- @) ~" l3 u" V# r' J...I...................9 D7 |7 g+ k, u7 S6 O
35
3 l3 N, d! T4 l3 D! N5 @$ S# dPort Mirroring: Y( U6 t% ~8 f6 i( q/ h
.36; R, [7 _2 l$ {! [3 u* A7 o* s* N6 W* e
Enabling Port mirroring……………,…,…,……( U! ^& ?0 x% C
::.:a.:aa.:aa:::a
& \8 A7 k6 c. |+ ?3 ~4 \360 d! K. n+ Q3 {, s# o# f
Capture port
6 r: j+ g: |7 i9 g l- s363 i7 v- p& v# m2 R# W8 p" }
Mirror Filtering rules...............9 X! t4 J) f$ U6 I# R5 \9 U& D
37
6 Z5 w9 u( t$ F" I) @Port mask filter: Q0 h% ?% p: {! m. d' C; x0 h/ A/ T
.37
' l# w8 Y. s6 e" t; X$ E+ m5 Z' OPacket divider filter.……
W; O9 t+ h3 \/ B# R# Z* D8 |∴37
t8 p/ @/ J+ r: {" u0 UIGMP Snooping* e1 u( P, h/ [ T# Y8 |$ J
..:.a::a::.:
; t% M( _9 J3 R$ f6 j+ i! a; s0 n37
; y& ?- b$ a* E! X1 KBROADCOMo" O7 N! g- {0 _; R# c' N8 x
Single-Chip 16-Port SerDes Gigabit Switch
6 r4 \. [4 b) E' gOctober4,2013·5396-DS114-R* I1 A9 d/ i' i k
Page 7' G+ v) V4 B6 w/ f+ L) T
BROADCOM CONFIDENTIAL( v* ? `/ ^; t1 y
2 f- ~. ~" A" B8 ]
BCM5396 Data Sheet+ l, F" h; c7 [
Table of contents
% v7 U' B& k1 d- XIP Layer IGMP Snooping………….…………………9 u, p7 i/ F- Q) ^: S: Q
38' t/ b; Y, I, e2 w$ S
IEEE Standard 802. 1x Port-Based Security, J( C ^" f& n# x
灬38
7 T6 e+ j1 D( {( G5 ]0 eAddress Management' y# F2 x) o4 t4 ?
1..
; S' M' S# p. n4 h ~, t% `( u39
1 j" k0 I8 e0 l SAddress Table Organization....,…,…,…,…,…
6 l0 T7 X, M. w' q39
3 n! }0 w# h+ I" Z# jAddress Learning..,..................
' u! J0 O- S1 w9 G; g l1 v···:a:::::a.··
# W3 @* h* {, d3 L8 S( Y40" T" `) h* U$ c" E0 a
Address resolution and frame Forwarding& J- Q" R1 Z X: ?
40; \9 R# K, @1 u
Unicast Addresses
- k8 D' U7 x, m" i4 j" x..400 F9 B3 Y; m* W9 x# L3 C3 J
Multicast Addresses.
2 L3 }/ A+ Z2 i% I3 e) k1 P8 M! zReserved multicast
: Q0 v0 u1 W+ b3 P2 \0 \8 h( f6 J44
+ Q& |; g! ^ Q% @7 S. _# D* IUsing the Multiport Addresses…,,,…,…,…,,…,…,14! r, F" E, H: X, k6 ~& I" F
Static Address entrⅰes
! B: m) Q5 D4 s' @1 m- `) v& s4- [, d1 i K1 k
Accessing the arl Table entries.......
8 g! o/ Z4 x! N, Q m, Y1 C∴45
' H3 V, Z. U; ~/ @+ P. h5 _Reading an ARL Entry…- w4 B0 c% K) d
45
4 D# @4 s, B6 UWriting an ARL Entry.……,…,…9 \2 n% N0 K! m4 @* C
45" O8 V8 g/ x' a' t7 \# P$ Q8 a
Searching the aRl table
9 G* L4 L# _( ]( S. n0 ?% I/ {46
5 @( |- ^5 [. A# ?% a& f! CAddress aging…....,.,,…,…,…
3 O) K5 ?( L% @4 p46
9 }) D* F8 a* A) P) eFast Aging to Support Rapid Spanning Tree Protocol.
6 h3 [4 a) d' w4 WBridge management…6 F$ j: i- r4 X( k& l. J. t
·自重自着重重7 z0 c8 N& f' ^: H$ D `8 ~0 w6 M
。(
- N% K! n, R1 o47- o' ^, ?' r6 X! V. T1 n4 ]
Spanning Tree port state…….% A, N3 n6 P: J5 O. N. K
47
7 ~0 s+ C$ C C* {" [. s$ @) \Disable$ M* ?) {: m0 M2 N; e
48
$ J5 N/ e+ X3 pblocking1 S" [; v6 M2 N3 Q; a6 r- E+ ?
48
. a, P8 T8 E& P3 qListening……,…,…,…,…,…/ h$ R; N/ w) N2 h5 D$ N$ s
48
1 \3 X3 P7 q7 |2 y1 ]) ?6 ?Learning...…,,…,…,…,…,…,…………481 u! j% S( \9 l
Forwarding.……
2 l) c5 s* n1 j48: Z6 _: ^+ `" A, z
Management Frames.,.,…,…,…,…,…,…,…,,49
4 b; M& L2 ~. G4 l$ T: |9 L+ ^Multiple Spanning tree Protocol (IEEE Standard 802. 1s)
/ i& L$ v; e2 q( z6 W' s3 a m50/ J0 \ t2 f6 z1 z
Section 3: System Functional blocks
) H9 i1 ]7 P6 Q3 N, ]( COverview: f2 _0 L8 T& ]8 D+ L) p& h$ x
酯·,' n( k/ a- S5 t9 A6 P7 K
.51
% A0 o: w9 G$ O) c7 b1 IMedia Access Controller.……; ^2 w# B9 ^, ]
51
2 o- P0 j- E$ F( G3 w2 CReceive function.……51
+ g9 W- u5 ?! d- M0 ITransmit function
& q6 @% B) p2 R. O' i.51; |: E9 y* r: @ s. g* d
Flow Contro.…52' y- i+ \! G3 K5 x7 S# H" o+ ?% p
10/100 Mbps Half-Duplex Mode...............52
. j; E$ \) |; G( O9 j! s10/100/1000 Mbps Full-Duplex Mode7 Y9 L0 D8 j8 {
521 ?* V: s: ~* {. h D+ }
Integrated High-Performance Memory$ p( g f* f6 q
52. A2 c$ _2 n1 J0 q* t; u i& L Q" {
Switch Controller3 ^0 b: o+ i' f% B/ v9 _
53
9 ^. _2 G8 @7 e6 f) g6 {/ \BROADCOMo
: [/ d! g- ?; p3 u) g1 m4 [* L. @0 ^Single-Chip 16-Port SerDes Gigabit Switch: R1 i+ t# d4 ?
October4,2013·5396-DS114-R
1 T' H$ a3 @% D0 aPage 8
( p g" Y$ o: p/ |/ z3 }BROADCOM CONFIDENTIAL! \; p; a" @0 ]! t) r8 X! c
- z! R7 I2 L. j: m
BCM5396 Data Sheet
2 K* B- z( g! j5 t% S6 NTable of contents3 e. [- ~) c3 e: {1 U
Buffer Management……………………53
* c2 p! J# d! o2 {( i- wMemory arbitration................0 \ `% w9 z$ V; k9 V4 {% J l
…53% G& y9 a$ v/ A
Transmit Output Port Queues……/ h9 [6 j" A x6 T
.53
0 k% @1 m0 C z+ o+ o0 wSection 4: System Interfaces
$ E6 @7 [7 n- o4 p* g( h p55
4 L) {: S; a) r* l5 t4 Y) COverview7 E! @, L" x1 ^) n, J
55' d% l+ q6 ]$ v a }0 {4 G
Serial| nterface∴
# h! Q! b" L2 B6 M+ F9 c55
2 q; I) M; A6 a" L) j% c: [) }# ?SGMIl Mode
, C8 Y/ ]8 x2 w8 w% S1 d$ {.55
' x! i2 L2 i7 O* l5 w) e; JSerDes mode,.wwwwwwwwwwwwwwwwwww56+ P! p+ z6 u! y6 |& F9 t" w7 P# B
SerDes/sgML auto-Negotiation5 r9 g6 L x1 `9 ]
6, |8 P3 D; n1 x
Frame Management
/ {& c$ i9 L! U) c6 E8 u1··,音着自着1着着··自首,.自
6 o/ c; }) s7 g9 R56
* O2 U% n6 \& c. H" r% ^5 q, w% z, oReverse mll port E( R/ j# s+ y. ~
566 E+ z* E$ j) d4 C1 W* p& o* p7 i+ w' G
GMll Port3 }, r& m3 n$ w8 V
:a::::::::.::$ k# g9 M4 k5 x0 ~& [) C% E
::::::::·:::::::::·:·....;::::a:::::::a::.:::" g; Z1 S& Z; [- _
57
4 V2 H4 s7 Z! ?, x. l# H3 u# c' P3 CRGMI Port
. j" T5 d2 C; _9 {# z: W; c着D着·非·自·着·4 i% Z" D# M b1 f
.576 h: c( R% s/ a+ s
In-Band Management Port ................................................................................................570 V- Y( E" i4 s f$ k
Programming Interfaces....................................
0 u/ J9 m8 U: Z1 U60
2 ^% T; V0 G \8 nSP|| nterface.…
% x' b. {3 K# b A60
0 P: p& {# t. QNormal spl mode
- R* F/ `9 R" Y62
( O% ` i! ~) U4 k9 `& F3 {& |6 ZFast sPl mode# Y. x: J* R4 O5 S# `/ A% o
652 I6 \, H: o8 a3 ]7 Y, c* K* R) u
EEPROM Interface..…,……………,……………………………………66
# L# e% i5 m( g0 | U0 aEEPROM Format; b# i* Z2 G2 f# c& j/ u* s
∴67
% M! P" B8 D5 K5 N: o; u: k$ dMDC/MDIO Interface.....................0 X* |9 O3 f! K+ `$ O7 F$ e* o
68
% `6 m" D) Y8 z. h, q$ E* A# lRegister Access Through Pseudo-PHY Interface
' `5 B1 ~0 B7 F: W) a( Y:·:·:::.:..:·.·/ k7 N7 B" ^6 Z, {( v! b) [5 H8 d
687 M/ w$ @% _, {
MDC/MDIO Interface Register Programming
1 W/ W: Z0 d" d7 s3 x72
: r; D1 B g# Y- O# PLED Interfaces
6 {+ ? ~0 A1 l74
" O- s8 O6 `8 j9 ~! L% jSerial led interface9 S' @ C- ^/ v5 q$ Q' Y6 O
74- L1 d4 z" i! S9 \
Section5: Hardware Signal Definitions………,………………………77
$ Q6 X: K$ q X6 e10 Signal Types.................
6 a- M' H' |4 k& m( n. [..:::::.::.:aaa::::a:::::a::::::
/ r, h: ^, h% Q0 a( g9 \778 `- J1 A6 S. j% B
Signal Descriptions" R [5 M1 C) L5 o* {
78, s1 v2 {; m7 p: K( i8 l) r& U
Section6: Pin Assignments…n…,…,…,…,……………84
# o) \* P, s) s5 }: DSection7: Register Definitions……,…,……,……,…,…,………89; @+ } P$ v3 J7 T* W; |
Register Definition..................% C" G9 M8 i1 z6 [
898 g) p) [ ~2 `
Control Registers .....................................! h4 j# X" @1 b9 x$ ]" s9 S& o
92/ \9 A% z6 J% U) p: r u
10/100/1000 Port N Control Register [0: 15](Page oOh: Address 00h-OFh)
* b3 f; u0 ~: t94' v- w h/ f1 V. Q/ o! z# w9 p
IMP Port(Port 16) Control Register(Page OOh: Address 10h).............94
/ c n* K4 p: q" H0 A( zSwitch Mode Register(Page ooh: Address 20h)
% y+ H' {' E m95
6 O9 n {4 f0 M! qBROADCOMo
/ U1 y8 B) r& E% W1 pSingle-Chip 16-Port SerDes Gigabit Switch
8 i8 ~ W1 |3 l4 J# s. gOctober4,2013·5396-DS114-R2 m7 R6 a+ k E3 r8 M% y/ ^
Page 9
. R- @! [* \* K% xBROADCOM CONFIDENTIAL; F- P" o2 K3 m4 }
# x) }1 f' X& G2 S" a; {# p
BCM5396 Data Sheet3 i" b4 ?, i9 o" ~6 }5 k
Table of contents9 n" |9 Z. j2 Y' Y% n* ]5 G5 K9 m
LED Control Register(Page oOh: Address 24h-25h)) l% k9 O. p* \: N! K7 t! N* v
.96
% W `3 l+ j% t8 O6 ^ dNew Control Register(Page ooh: Address 3Bh)
& m9 t* E/ Y) a9 O4 c∴96
! ~$ O) f. F: m& H, Y# @Reserved Multicast Control Register (Page ooh: Address 50h
) T9 b% w3 E) |- V4 M97
, I" O U$ b; b1 X8 v1 `! E) XLoad Meter Update Rate Control Register(Page00h: Address51h}………….….….….…97
0 [: z, M' s: {' kUnicast Lookup Failed Forward Map register(Page 00h Addr 54h-57h).............98, s1 m+ W" u7 R& M' P% T
Multicast Lookup Failed Forward Map register(Page 00h: Address 58h-5Bh)...........98. ?" r$ G8 D$ X+ p4 x# i$ Q
Port N State Override register[0: 15](Page oOh: Address 60h-6Fh)
5 T8 y) l: g" ?& t" V98. c }5 m( X) B* e* }' o3 o
Port 16(IMP) State Override Register(Page OOh: Address 70h)
9 R% z; f$ ?. z4 t% Q3 P99
4 w9 o8 U4 B* T3 }6 m% U V802. 1X Control Register 1 (Page oOh: Address 77h)/ _* ?7 F) x; {3 R9 L8 d4 B; z& {: f
100' ]' `: Z0 E& X# y( J' z! v1 ?2 D% w
802. 1X Control Register 2(Page oOh: Address 78h-7Bh)..........................1001 F! R7 a0 b" F9 w5 g n% p6 b
SD DEFAULT Register(Page oOh: Address 80h-83h)
0 r2 R3 M/ M; n) I! \. p- V' X' ?+ V4 l100) i- Z& J! E( s, l, X
SD SEL EARLY Register(Page 00h: Address 84h-85h).......................1017 E0 y; @: m7 t, d6 F8 |
EXTERNAL PHY SCAN CONTROL Register4 X3 e$ v/ S' t: ^& e& N
Fast Aging Control Register(Page ooh: Address 88h)
4 _' g a) V N2 y# t6 H+ }102/ Y# Y( w* x4 N: l, `$ S
Fast Aging Port Register(Page OOh: Address 89h)
6 N- m1 C! Z6 G4 |102
5 b5 _- e0 y" U3 k8 Z4 Y4 I9 T, zFast Aging VID Register( Page C0h: Address8Ah-8Bh),,,…………………102! k+ X0 \: [4 Z8 k2 ~
Pause Frame Detection Control Register(Page 00h: Address 90h).................103' Q) s' S- O. X7 A3 X
Status Registe
V, q1 q- `8 ^1046 t2 L3 |" V8 z8 l# w+ i* i
Link Status Summary( Page O1h: Address00h-03h)…….….……………………………………1055 h. e( C( M1 k; x# x
Link Status Change(Page 01h: Address 04h-07h)........................105& w# Q' F# z8 N" T
Port Speed Summary (page 01h: Address 08h-oFh).........................1058 C7 U1 m- K+ k2 T. X/ b ~) H5 V7 x
Duplex Status Summary( Page o1h: Address 10h-13h)" o0 X% l5 E$ F) }' u
.106
1 E7 r8 f) u+ U8 q5 E: J4 zTX Pause Status Summary(Page 01h: Address 14h-17h
8 \* r* P* z% K+ z4 r# \106, t* C# b5 | m
RX Pause Status Summary(Page 01h: Address 18h-1Bh
5 X# r9 p: ?. w' k( I6 sa.::.::.::6 h3 ]3 a+ J5 C& U+ k
1064 J' }# p" a; M$ x
Port N PHY Status Register[0: 15](Page 01h: Address 20h-2Fh)..........................107
3 c6 U* |3 h" j9 |/ r C- d; ISerDes signal Detect Status Register (Page 01h: Address 40h
+ v' o3 O" Z- U' P& [$ l+ ~107) ?# r" ?6 a3 R# X4 M( ?
BIsT Status Register(Page01h, Address45h)....,.,.,.,,…,…,…,…,………,107
" W4 M2 X7 v' I* C+ SStrap value register(Page 01h: Address 70h-73h).................................108( f2 D7 f6 C8 y' q
Management Mode registers
6 m/ [3 z1 s E' W5 f+ x,………,109: v% ]7 Q6 p- ` }; ~; ]& E
Global Management Configuration Register" D Y; \+ a! Z" }1 g; }/ r
109 y) d9 d& [ L3 }* x
Aging Time Control(Page02h: Address och-0Fh).,,,,…,………………110* q: r2 F4 o/ x- @2 w
irror Capture Control Register(Page 02h: Address 10h-11h
0 S1 c: W4 E5 p1 P6 v# p10
7 P4 A( [% v6 j8 d2 \Ingress Mirror Control Register (Page 02h: Address 12h-15h)...................111" s2 ]7 E1 z2 I% P
Ingress Mirror Divider(Page 02h: Address 16h-17h)
; Y( h( C, ?) |/ p111; }% l' `3 ?" e
Egress Mirror contro| Register(Page02h: Address1Ch-1Fh).……………………,112: @* N9 C! @( D' c) [ w
Model ID(Page 02h: Address 30h
8 _$ [& O1 x4 G, Z1129 e" H/ y2 q; x: X
BROADCOMo* @; G/ `4 o0 Z5 X8 H
Single-Chip 16-Port SerDes Gigabit Switch
0 P& q' t* `; r* m2 Y- kOctober4,2013·5396-DS114-R
$ r8 X n ^9 q" y( ~+ APage 10 h) n5 g7 Z+ v f0 _
BROADCOM CONFIDENTIAL
( L7 B1 e! z6 Y3 T$ t$ S' y5 h
6 [( a; }* x; Q, f* ]0 X
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